Decoding the technologies of tomorrow, today.
Exploring the breakthrough innovations shaping our world. From AI infrastructure and robotics to biotech, quantum computing, and spatial tech.
Exploring the breakthrough innovations shaping our world. From AI infrastructure and robotics to biotech, quantum computing, and spatial tech.
For most of the digital era, computing has been built around a simple idea: represent information with discrete states and use highly reliable transistor-based circuits to manipulate those states. That model enabled general-purpose software, inexpensive data storage, and an enormous ecosystem of programmable hardware. It remains the foundation of modern computing, but the growth of artificial intelligence has exposed some of its less obvious costs. Large AI workloads can require enormous amounts of data to move between memory and processing units, and that movement can consume a significant share of a system's energy even when the underlying mathematical operations are highly repetitive.
Analog computing takes a different approach by allowing electrical properties such as voltage, current, and conductance to represent numerical values directly. The renewed interest is not a return to the analog computers of the mid-20th century, nor is it an argument that digital electronics have reached the end of their usefulness. Instead, researchers and chip designers are exploring analog and mixed-signal techniques for specialized workloads, particularly the matrix and tensor operations common in AI. The central question is practical rather than ideological: can physical computation reduce the cost of moving and processing data enough to justify the additional challenges of noise, limited precision, calibration, and software complexity?
A useful way to understand analog computing is to look at what happens inside a circuit rather than at the instructions presented to a processor. In a conventional digital implementation, numerical operations are represented through discrete electronic states and carried out by logic circuits under the control of a digital architecture. Data may need to travel between memory, registers, arithmetic units, and other parts of the system as an operation proceeds. Modern processors are extraordinarily efficient at this work, but repeated movement becomes increasingly important when an application performs enormous numbers of similar operations on large datasets.
Analog accelerators can instead encode values as physical quantities and allow the circuit to perform calculations through its electrical behavior. In a resistive crossbar, for example, input voltages can be applied to rows while programmable conductances represent weights. Ohm's law determines the current associated with each individual connection, while Kirchhoff's current law describes how those currents combine at the columns. Because many connections operate concurrently, the circuit can perform a large collection of multiply-and-accumulate operations through the physical behavior of the array rather than executing each multiplication as a separate digital instruction.
The important point, however, is not that analog computation happens "instantaneously." Real circuits still have propagation delays, bandwidth limits, settling times, parasitic effects, and other physical constraints. The advantage comes from parallelism at the physical layer: many operations can occur concurrently within an array. That distinction matters because an analog accelerator is still an engineered system with finite speed and energy requirements. Its performance depends not only on the analog core but also on memory access, signal conditioning, communication, conversion circuitry, and the workload being executed.
The historical limitations of analog computing have not disappeared. Analog circuits remain sensitive to electrical noise, temperature changes, component variation, and manufacturing differences, while numerical precision is inherently more difficult to control than in conventional digital logic. The difference today is that engineers can combine analog computation with mature digital circuitry instead of requiring the entire computer to operate in an analog domain. Modern designs can therefore assign different responsibilities to different parts of the system, using analog circuits for selected mathematical operations while relying on digital logic for control, storage, communication, and system management.
This mixed-signal approach introduces an important engineering tradeoff. Digital-to-analog converters can translate digital inputs into physical signals, while analog-to-digital converters can translate the computed results back into digital representations. Calibration circuits and software can compensate for some device variation and environmental changes. These additions make the system more practical, but they also consume energy, silicon area, and design effort. As a result, the efficiency of an analog computing system cannot be judged simply by measuring its analog core. The more meaningful question is whether the complete system, including conversion, memory, control, communication, and calibration, uses fewer resources than the digital alternative for the same useful task.
This is one reason analog computing should not be described as a simple replacement for digital processors. The most promising designs are specialized accelerators that sit alongside conventional computing hardware. A CPU or digital accelerator may handle general-purpose operations, while an analog block performs a narrowly defined class of matrix or signal-processing calculations. Such specialization can make sense when the workload is repetitive enough to justify the hardware, the required numerical precision is manageable, and the energy saved by physical parallelism is greater than the overhead introduced by the surrounding digital circuitry.
Artificial intelligence has created an unusually strong reason to revisit these techniques because many neural-network workloads contain large numbers of repeated matrix and tensor operations. A model may apply the same general type of computation across enormous collections of weights and activations, creating an opportunity for specialized hardware to perform those operations more efficiently. Conventional GPUs and AI accelerators are already extremely good at this task, which is why analog computing should not be viewed as an obvious replacement. Its attraction comes from targeting a different part of the problem: reducing the cost of repeatedly moving numerical data between memory and arithmetic units.
Analog crossbar arrays are particularly interesting because they can store computational weights in the physical properties of the array while simultaneously participating in the calculation. This creates a form of in-memory computing in which the storage medium and computational operation are closely connected. Instead of repeatedly reading a weight into a separate arithmetic unit, the conductance of a device can contribute directly to the resulting current. When many such devices operate in parallel, the physical structure of the memory array begins to resemble the mathematical structure of the operation being performed.
That does not mean every AI model will benefit equally. Dense matrix workloads with predictable dataflow may provide a better match than algorithms requiring frequent branching, high numerical precision, or substantial changes to stored parameters. Training can also present different requirements from inference because training involves repeated weight updates and often places greater demands on numerical stability. Analog approaches may therefore be particularly attractive for selected inference workloads and other specialized operations, while conventional digital accelerators remain preferable when flexibility, precision, and mature software support are more important than maximum energy efficiency.
One of the defining challenges of analog computation is numerical precision. Digital systems can represent values using increasingly large numbers of bits, with well-defined behavior that makes high-precision arithmetic practical. Analog circuits instead operate within physical limits imposed by noise, device variation, temperature, signal range, and the accuracy with which electrical quantities can be generated and measured. A small change in voltage or conductance may represent a meaningful numerical error, particularly when many operations are chained together. This does not make analog computing unusable, but it means that precision has to be treated as part of the architecture rather than assumed to be unlimited.
For AI inference, that tradeoff can sometimes be manageable because many machine-learning models already tolerate reduced numerical precision. Quantized neural networks demonstrate that useful results can often be obtained without representing every value at traditional floating-point precision. Scientific simulation, financial modeling, and other applications with strict numerical requirements may be less forgiving. The right question is therefore not whether analog hardware is "accurate enough" in general, but whether its available precision is sufficient for the specific algorithm and whether the resulting accuracy, energy use, and latency form a useful tradeoff.
The conversion between digital and analog representations creates another part of this precision budget. If a system repeatedly converts data from digital values to analog signals and then converts results back into digital form, the energy and latency associated with ADCs and DACs can reduce the advantage gained inside the analog array. A highly efficient analog operation does not automatically produce a highly efficient computer. System designers therefore try to maximize useful work performed between conversions, reduce unnecessary precision, and structure workloads so that the analog core does enough computation to justify the cost of surrounding circuitry.
The strongest potential applications for analog computing are those where the workload is highly structured and where energy efficiency matters enough to justify specialized hardware. AI inference, edge processing, signal analysis, and certain forms of sensor processing are natural candidates because they can involve repeated numerical operations over relatively predictable data structures. In these settings, an accelerator can be designed around a particular computational pattern rather than carrying the full flexibility of a general-purpose processor. If the reduction in data movement and parallel physical computation outweighs conversion and calibration overhead, analog hardware can provide a meaningful system-level advantage.
Other workloads are less obvious candidates. General-purpose software needs flexibility, predictable numerical behavior, and a mature programming environment, all areas where conventional digital processors have enormous advantages. Algorithms that frequently change their data structures, require high precision, or depend on complex control flow may not map naturally onto analog arrays. Even an AI workload that looks suitable on paper can lose its advantage if memory movement, ADC and DAC operations, or calibration consume too much of the system's resources. Analog computing therefore makes more sense as a workload-specific architecture than as a universal successor to digital computing.
This distinction also changes how performance claims should be evaluated. Reports of very large improvements in energy efficiency or throughput can be meaningful, but they need to be interpreted in the context of the workload, numerical precision, comparison hardware, memory technology, and whether peripheral circuitry is included in the measurement. A result from an analog core alone is not equivalent to the efficiency of a complete accelerator. The most useful comparisons measure the entire system performing the same task at an acceptable level of accuracy, because that is the level at which users ultimately experience the technology.
Hardware efficiency is only part of the adoption problem. Digital computing benefits from decades of software development, including mature compilers, optimized libraries, machine-learning frameworks, profiling tools, and established programming models. Analog accelerators need additional mechanisms for mapping numerical weights onto physical devices, managing calibration, accounting for device variation, and adapting models to the non-ideal behavior of the hardware. These requirements can make development more specialized and can increase the engineering effort needed to move an existing model from a conventional accelerator to an analog implementation.
Manufacturing introduces another layer of complexity. Analog and mixed-signal systems can be sensitive to variations in devices and interconnects that would be less significant in purely digital logic. Engineers can address these issues through circuit design, calibration, redundancy, error management, and software techniques, but each solution has a cost. Device endurance and conductance stability can also matter when memory technologies are used to represent computational weights. The practical goal is therefore not to eliminate every source of physical variation, which may be unrealistic, but to design a system whose errors remain predictable and manageable for the intended workload.
These constraints explain why the current direction of analog computing is better described as specialization rather than a wholesale return to analog electronics. The digital ecosystem is too mature and flexible to be displaced simply because analog circuits can perform certain operations efficiently. A more realistic future involves heterogeneous systems in which different forms of hardware handle different parts of a workload. Analog accelerators could become valuable components within those systems if they can demonstrate repeatable system-level benefits while keeping programming, calibration, and manufacturing requirements under control.
The renewed interest in analog computing does not signal the end of digital electronics. Digital systems remain exceptionally good at general-purpose computation because they combine predictable numerical behavior, programmability, manufacturing maturity, and a huge software ecosystem. Those advantages are difficult to reproduce with a specialized analog architecture. Even in a system that uses analog computation extensively, digital components are likely to remain responsible for control, communication, storage, conversion, and many operations that are poorly suited to physical analog processing.
The more useful way to think about analog computing is as another option in the expanding hardware toolbox for AI and other data-intensive workloads. GPUs, CPUs, digital AI accelerators, FPGAs, and neuromorphic processors each make different tradeoffs between flexibility, throughput, latency, energy, and programmability. Analog accelerators add another point in that design space. Their potential advantage comes from allowing certain calculations to take place directly through the physical behavior of a circuit, reducing some of the data movement and switching that conventional digital implementations require.
The future of analog computing will therefore depend less on whether it can "beat" digital computing in general and more on whether it can solve specific problems better. If engineers can manage precision, conversion overhead, device variation, software integration, and manufacturing complexity, analog techniques may become an important part of specialized AI hardware. That would represent a meaningful development without requiring a return to the computing architectures of the past. Rather than replacing binary computing, modern analog systems are exploring where computation can benefit from using the physical world more directly.